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VGA |
 |
| Pin 1 |
RED |
Red video |
| Pin 2 |
GREEN |
Green video |
| Pin 3 |
BLUE |
Blue video |
| Pin 4 |
ID2/RES |
formerly Monitor ID bit 2, reserved since E-DDC |
| Pin 5 |
GND |
Ground (HSync) |
| Pin 6 |
RED_RTN |
Red return |
| Pin 7 |
GREEN_RTN |
Green return |
| Pin 8 |
BLUE_RTN |
Blue return |
| Pin 9 |
KEY/PWR |
formerly key, now +5V DC |
| Pin 10 |
GND |
Ground (VSync, DDC) |
| Pin 11 |
ID0/RES |
formerly Monitor ID bit 0, reserved since E-DDC |
| Pin 12 |
ID1/SDA |
formerly Monitor ID bit 1, I²C data since DDC2 |
| Pin 13 |
HSync |
Horizontal sync |
| Pin 14 |
VSync |
Vertical sync |
| Pin 15 |
ID3/SCL |
formerly Monitor ID bit 3, I²C clock since DDC2 |
|
|
SCART |
 |
| Pin 1 |
Audio output (right) |
| Pin 2 |
Audio input (right) |
| Pin 3 |
Audio output (left/mono) |
| Pin 4 |
Audio ground |
| Pin 5 |
RGB Blue ground (pin 7 ground) |
| Pin 6 |
Audio input (left/mono) |
| Pin 7 |
RGB Blue up
S-Video C down
Component Pb up |
| Pin 8 |
Status & Aspect Ratio up
- 0–0.4V → off
- 5–8V → 16:9
- 9.5–12V → on/4:3
|
| Pin 9 |
RGB Green ground (pin 11 ground) |
| Pin 10 |
Clock / Data 2
Control bus (AV.link) |
| Pin 11 |
RGB Green up
Component Y up |
| Pin 12 |
Reserved / Data 1 |
| Pin 13 |
RGB Red ground (pin 15 ground) |
| Pin 14 |
Data signal ground (pins 8, 10 & 12 ground) |
| Pin 15 |
RGB Red up
S-Video C up
Component Pr up |
| Pin 16 |
Blanking signal up
RGB-selection voltage up
- 0–0.4V → composite
- 1–3V → RGB
|
| Pin 17 |
Composite video ground (pin 19 & 20 ground) |
| Pin 18 |
Blanking signal ground (pin 16 ground) |
| Pin 19 |
Composite video output
S-Video Y output |
| Pin 20 |
Composite video input
S-Video Y input |
| Pin 21 |
Shell/Chassis |
|
|
S-VIDEO |
 |
| Pin 1 |
GND |
Ground (Y) |
| Pin 2 |
GND |
Ground (C) |
| Pin 3 |
Y |
Intensity (Luminance) |
| Pin 4 |
C |
Color (Chrominance) |
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|
HDMI |
 |
| Pin 1 |
TMDS Data2+ |
|
| Pin 2 |
TMDS Data2 Shield |
|
| Pin 3 |
TMDS Data2– |
|
| Pin 4 |
TMDS Data1+ |
|
| Pin 5 |
TMDS Data1 Shield |
|
| Pin 6 |
TMDS Data1– |
|
| Pin 7 |
TMDS Data0+ |
|
| Pin 8 |
TMDS Data0 Shield |
|
| Pin 9 |
TMDS Data0– |
|
| Pin 10 |
TMDS Clock+ |
|
| Pin 11 |
TMDS Clock Shield |
|
| Pin 12 |
TMDS Clock– |
|
| Pin 13 |
CEC |
|
| Pin 14 |
Reserved (HDMI 1.0-1.3c), HEC Data- (Optional, HDMI 1.4+
with Ethernet) |
|
| Pin 15 |
SCL (I²C Serial Clock for DDC) |
|
| Pin 16 |
SDA (I²C Serial Data Line for DDC) |
|
| Pin 17 |
DDC/CEC/HEC Ground |
|
| Pin 18 |
+5 V Power (max 50 mA) |
|
| Pin 19 |
Hot Plug Detect (All versions) and HEC Data+ (Optional, HDMI
1.4+ with Ethernet) |
|
|
DVI |

 |
| Pin 1 |
TMDS Data 2− |
Digital red − (Link 1) |
| Pin 2 |
TMDS Data 2+ |
Digital red + (Link 1) |
| Pin 3 |
TMDS Data 2/4 shield |
|
| Pin 4 |
TMDS Data 4− |
Digital green − (Link 2) |
| Pin 5 |
TMDS Data 4+ |
Digital green + (Link 2) |
| Pin 6 |
DDC clock |
|
| Pin 7 |
DDC data |
|
| Pin 8 |
Analog vertical sync |
|
| Pin 9 |
TMDS Data 1− |
Digital green − (Link 1) |
| Pin 10 |
TMDS Data 1+ |
Digital green + (Link 1) |
| Pin 11 |
TMDS Data 1/3 shield |
|
| Pin 12 |
TMDS Data 3- |
Digital blue − (Link 2) |
| Pin 13 |
TMDS Data 3+ |
Digital blue + (Link 2) |
| Pin 14 |
+5 V |
Power for monitor when in standby |
| Pin 15 |
Ground |
Return for pin 14 and analog sync |
| Pin 16 |
Hot plug detect |
|
| Pin 17 |
TMDS data 0− |
Digital blue − (Link 1) and digital sync |
| Pin 18 |
TMDS data 0+ |
Digital blue + (Link 1) and digital sync |
| Pin 19 |
TMDS data 0/5 shield |
|
| Pin 20 |
TMDS data 5− |
Digital red − (Link 2) |
| Pin 21 |
TMDS data 5+ |
Digital red + (Link 2) |
| Pin 22 |
TMDS clock shield |
|
| Pin 23 |
TMDS clock+ |
Digital clock + (Links 1 and 2) |
| Pin 24 |
TMDS clock− |
Digital clock − (Links 1 and 2) |
| C1 |
Analog red |
|
| C2 |
Analog green |
|
| C3 |
Analog blue |
|
| C4 |
Analog horizontal sync |
|
| C5 |
Analog ground |
Return for R, G and B signals |
|
|
DISPLAYPORT |
 |
| Pin 1 |
ML_Lane 0 (p) |
Lane 0 (positive) |
| Pin 2 |
GND |
Ground |
| Pin 3 |
ML_Lane 0 (n) |
Lane 0 (negative) |
| Pin 4 |
ML_Lane 1 (p) |
Lane 1 (positive) |
| Pin 5 |
GND |
Ground |
| Pin 6 |
ML_Lane 1 (n) |
Lane 1 (negative) |
| Pin 7 |
ML_Lane 2 (p) |
Lane 2 (positive) |
| Pin 8 |
GND |
Ground |
| Pin 9 |
ML_Lane 2 (n) |
Lane 2 (negative) |
| Pin 10 |
ML_Lane 3 (p) |
Lane 3 (positive) |
| Pin 11 |
GND |
Ground |
| Pin 12 |
ML_Lane 3 (n) |
Lane 3 (negative) |
| Pin 13 |
CONFIG1 |
connected to Ground1) |
| Pin 14 |
CONFIG2 |
connected to Ground1) |
| Pin 15 |
AUX CH (p) |
Auxiliary Channel (positive) |
| Pin 16 |
GND |
Ground |
| Pin 17 |
AUX CH (n) |
Auxiliary Channel (negative) |
| Pin 18 |
Hot Plug |
Hot Plug Detect |
| Pin 19 |
Return |
Return for Power |
| Pin 20 |
DP_PWR |
Power for connector (3.3 V 500 mA) |
|
|
MINI DVI |
 |
| Pin 1 |
Dat2_P |
Data 2 + |
| Pin 2 |
Dat2_N |
Data 2 - |
| Pin 3 |
Dat1_P |
Data 1 + |
| Pin 4 |
Dat1_N |
Data 1 - |
| Pin 5 |
Dat0_P |
Data 0 + |
| Pin 6 |
Dat0_N |
Data 0 - |
| Pin 7 |
CLK_P |
Clock + |
| Pin 8 |
CLK_N |
Clock - |
| Pin 9 |
DGND |
|
| Pin 10 |
DGND |
|
| Pin 11 |
DGND |
|
| Pin 12 |
DGND |
|
| Pin 13 |
DGND |
|
| Pin 14 |
DGND |
|
| Pin 15 |
DGND |
|
| Pin 16 |
DGND |
|
| Pin 17 |
+5 V |
|
| Pin 18 |
DCC_DAT |
|
| Pin 19 |
spare |
|
| Pin 20 |
BLUE |
Analogue blue |
| Pin 21 |
not installed |
|
| Pin 22 |
GREEN |
Analogue green |
| Pin 23 |
not installed |
|
| Pin 24 |
RED |
Analogue red |
| Pin 25 |
Detect |
|
| Pin 26 |
DCC_CLK |
|
| Pin 27 |
spare |
|
| Pin 28 |
DGND |
|
| Pin 29 |
HSYNC |
Horizontal sync |
| Pin 30 |
DGND |
|
| Pin 31 |
VSYNC |
Vertical sync |
| Pin 32 |
DGND |
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